rq3
Senior Member
I trust someone smarter than me can help. I am deep into the A/D converter capabilities of the 8M2 Picaxe, and am very confused by the Microchip 12F1840 data sheet.
I have written, and successfully used, Picaxe code using the internal 1.024 volt reference for the ADC function. I believe it works because changing the reference to 2.048 volts requires double the input for the same response. My test equipment is more than capable of sub-millivolt accuracy and resolution.
However, the base chip data sheet says the reference voltage is set by selecting the gain of a buffer amplifier (1X, 2X, 4X). The data sheet goes on to say that any output of the buffer amplifier can be used as the reference for the A/D converters. The data sheet then goes on to say don't use the 1.024 volt reference (1X) output of the amplifier as an A/D reference. It appears to work just fine, but why? Is it reliable? Does it have lousy tolerances (unlikely, since the 2X and 4X values are derived from it?). I'm aware of the errata sheet from Microchip that Goeytex found specifying that the 1.024 volt reference be approached in steps. That is not a problem. Nor does it appear to be necessary. Microchip gives no reason for the errata sheet. Is this only something that shows up when the chip is running under liquid nitrogen, or boiling water, or when the moon is full?
In a similar vein, the Microchip data sheets don't have any kind of "internal schematic", unlike the old National Semiconductor or Texas Instrument data sheets. It's not possible to determine whether an active logic output pin (high, low) is established through a MOSFET totem-pole. In other words, can an active LOW output pin safely sink current from a logic pin at a voltage lower than Vdd. I'd say: "Of course it can". But there is nothing that I can find in the data sheet that explicitly says so, especially with all of the other functions which may, or may not, be "attached" to any particular pin. I can envision a situation in which releasing the pin from an active low could temporarily put Vdd level voltages on the pin, effectively back-driving the in-coming low voltage logic gate with excessive current.
I know I'm probably asking questions that don't apply to the "normal" Picaxe environment, but even the manufacturer of the silicon seems to be less than forthcoming with answers to questions like these.
Any thoughts?
I have written, and successfully used, Picaxe code using the internal 1.024 volt reference for the ADC function. I believe it works because changing the reference to 2.048 volts requires double the input for the same response. My test equipment is more than capable of sub-millivolt accuracy and resolution.
However, the base chip data sheet says the reference voltage is set by selecting the gain of a buffer amplifier (1X, 2X, 4X). The data sheet goes on to say that any output of the buffer amplifier can be used as the reference for the A/D converters. The data sheet then goes on to say don't use the 1.024 volt reference (1X) output of the amplifier as an A/D reference. It appears to work just fine, but why? Is it reliable? Does it have lousy tolerances (unlikely, since the 2X and 4X values are derived from it?). I'm aware of the errata sheet from Microchip that Goeytex found specifying that the 1.024 volt reference be approached in steps. That is not a problem. Nor does it appear to be necessary. Microchip gives no reason for the errata sheet. Is this only something that shows up when the chip is running under liquid nitrogen, or boiling water, or when the moon is full?
In a similar vein, the Microchip data sheets don't have any kind of "internal schematic", unlike the old National Semiconductor or Texas Instrument data sheets. It's not possible to determine whether an active logic output pin (high, low) is established through a MOSFET totem-pole. In other words, can an active LOW output pin safely sink current from a logic pin at a voltage lower than Vdd. I'd say: "Of course it can". But there is nothing that I can find in the data sheet that explicitly says so, especially with all of the other functions which may, or may not, be "attached" to any particular pin. I can envision a situation in which releasing the pin from an active low could temporarily put Vdd level voltages on the pin, effectively back-driving the in-coming low voltage logic gate with excessive current.
I know I'm probably asking questions that don't apply to the "normal" Picaxe environment, but even the manufacturer of the silicon seems to be less than forthcoming with answers to questions like these.
Any thoughts?
Last edited: