Hi,
Generally, I strive to absolutely minimise the number of external components in any circuit design, particularly with Microchip devices that have such an impressive number of additional on-chip functions (Gates, Op-Amps, etc.). The additional price of a package with more pins is relatively small, whilst the "cost" of external components should include the design, assembly, testing, circuit board area and inventory, etc.. The 7x5 Matrix/display in this thread is so tiny that additional (driver) transistors shouldn't be necessary (unless used outdoors?), but it requires 12 pin connections so the "obvious" PICaxe to choose is an 18 or 20M2. However, the following requirement/specification from post #13 might make this a "special case" :
I only need to drive one small 5 x 7 matrix, .... I want to make this piggy back onto the ltp-305 so I may need to go surface mount as well.
Normally, a backpack or "daughter board" would be expected to be
smaller than (and/or to not overhang the sides of) the main "mother" board or module: Particularly, for a display which might be required to be "End (and/or Side) -Stackable", or to be mounted from the front though a panel cutout. But here, the display is a very small 14-pin DIL (Dual-In-Line) package, obviously shorter than an 18/20 pin DIP PICaxe, and surprisingly, also
narrower than the 18/20 pin SMD (SSOP) packages (because the SMD "pins" extend horizontally, rather than bending through 90 degrees into the circuit board). Therefore, the PICaxe 14M2 is worthy of consideration; the DIP is obviously no larger than the Display, and also the SMD (SSOP) version
is narrow enough to fit between the pins of the Display package.
The feature which allows a 14M2 to drive all 12 display pins is that only one pin in either the Row or Column group needs to be selected at any instant in time (i.e. with a "walking 0" or "1" logic level moving across the port). This could be implemented by a hardware Shift Register (a common method with Multiplexed/Matrix displays), but adding another IC package is not sensible in this application (particularly as most standard "logic" families have a
lower current-drive capability than the PIC{axe} ports). The characteristic employed here is that most PICaxe pins have a "Tri-State" output capability, i.e. "Low", "High" and "Floating" (implemented by an INPUT or DIRS command/variable). Thus, each of 3 pins (C.0 , C.1 and C.2 chosen here) can directly drive one of three Display Row pins "Low", OR output a "High" to activate one of three external transistors, each pulling another associated display pin "Low". Therefore, only 3 PICaxe pins are required to control 6 Display pins, with a 4th pin driving the 7th Display Row in a normal manner. This 4th pin might be C.3 (using its internal "Weak Pullup resistor" and another external transistor) or C.4 directly. However, C.4 is the only free, full I/O pin now available for any "User" application, so here I have allocated the serial output (B.0) to drive the final Row pin.
Floating (i.e. Tri-Stating) the PICaxe pins can work very well, but we must not overlook that there are 5 LEDs (Cathodes) inside the display package, which are also connected to each Row Pin. Therefore, we must consider any currents which might flow through this array and interfere with the operation of the external transistor(s): Thus, always one of the pull-down Row-driver transistors should be active (at least whenever a Column pin is being pulled High) to limit the highest voltage on the Anodes. Then a "worst case" is when all 5 groups of LEDs are pulled High by the Column Drivers, so typically 20 mA would flow through the (PICaxe) active Row-driver pin. This could pull the pin up to 0.75 volt above Ground, then the forward drop of about 1.75 volts across any activated LED, would take the Common Anode matrix lines/pins up to about 2.5 volts above ground:
Thus, the other LEDs in the array may "leak" a current (of many uA) to all the other Cathodes, through a forward voltage drop of say 1.5 volts, such that up to 1 volt may appear on the Row pin(s) that are intended to be "floating". Normally, the base of a bipolar transistor needs to be held below about 400 mV to ensure that it is completely OFF, so a potential divider of 4k7 + 2k2 is used to reduce the 1v input to around 2k2 / 6k9 = 320 mV. At other times when the PICaxe output is pulled HIGH, the 4k7 passes about 400 uA into the base (with a further ~270 uA through the 2k2 drain) to switch ON the transistor. This base current is chosen unusually low: Data Sheets typically specify the "Collector Saturation voltage" at 10 times the base current (i.e. 20 mA / 10 = 2 mA, but "hard" saturation is not required here, for a Vce ON around 0.75v (i.e. equivalent to the level achieved by the PICaxe). Therefore a value of "collector current / 50" should be satisfactory for a device such as the BC548, which has a current capability up to 100 mA and a gain that peaks around 20 mA.
Another complication is that the 4k7 + 2k2 resistor chain itself can pull about 1 / 6.9k = 150 uA through any LED that has its Anode pulled High, which may cause it to glow dimly (but clearly noticeable in low ambient light levels). Two alternative solutions have been considered:
The first method is to Activate the PICaxe's "Weak Pullup" resistors when the associated PICaxe pins are configured as Input or Floating. These Pullups are typically 30k ohms or 130 uA output (at 4 volts; max 200 uA), which should bias the Cathode/Row pins high enough that current won't flow significantly through the (unselected) LEDs. It was primarily the WPU resistor values that determined the choice of the 4k7 + 2k2 values to achieve this, whilst not turning the transistor ON.
The alternative solution is to use a FET driver such as the popular 2N7000, which should easily saturate at a Gate voltage above ~3.5v and be OFF below 1 volt (but neither value is absolutely "guaranteed" by its data sheet). In this case (shown in one of the Row driver positions below) the input series resistance is zero (to maximise the Gate voltage), whilst a light pull-down is still required to overcome the floating input. But this resistor should be much higher at 100k or even 1M ohm (with the WPU NOT activated) to avoid illuminating the display LED (or switching ON the FET). In addition to saving one resistor per stage, the FET has an advantage that both its Gate and Drain can be wired directly to two (Cathode) pins of the display, which may simplify the overall circuit board layout.
Here is a suggested schematic diagram, it's not tested (and cannot be, because I don't have that particular Display) but I'm moderately confident that it should work. However, caution is always needed with a Multiplexed display, because currents or voltages can take "unexpected" paths through the matrix and "spoil" the display. Note that for the serial input pin (C.5), only the 100k pulldown resistor is essential; the 22k and programming adapter may be connected externally as/when required.
Personally, if I were constructing (one of) such a module, I still prefer to use through-hole components, but the pins of the two identical footprint packages must compete for "hole" locations on both sides of a single circuit board. Therefore, I would employ two similar "Pseudo PCB" prototyping boards (Vero, Strip or Pad Boards, etc.), one each for the Display and PICaxe, the same size as the DIL package (i.e. 4 x 7 holes) forming the "bread" of a sandwich, with the discrete components (particularly resistors) mounted vertically as the "meat" in the sandwich. The majority of the discrete components would occupy the two rows of holes
between the DIL package pins, but some (transistors in particular) could be soldered directly onto the back of the DIL package/socket pins to which they need to connect. However, the pinout of the LTP-305 display package is so "horrible" (with no logical external pattern of pin functions) that it may be necessary to adopt any convenient pin sequence to link each Port to its respective Anode or Cathode pins, and then "unscramble" the bits with a simple Lookup (Table) in the Program.
Here is a
"Pebble" layout which IMHO can give a good compromise between a Schematic and Layout design presentation (but it has no Simulation, Analysis or "Sanity" Checking capabilities). The Port.Pin to Column/Row pin sequences should be shown correctly, but it might not be possible to achieve this in a "final" (compact) circuit board design. In principle, Pebble can be used also for simple Pseudo-PCB layouts, but probably not for my "three-dimensional" (multi-layer) construction suggested above.
To summarise the overall functionality; the three external transistors are NOT employed to increase the LED's drive current (brightness) but only to act as "gates", adding (3) pin drivers that are not available in the smaller, 14M2 package. The (7) Cathode/Row pins are driven in sequence (i.e. by a "walking 0") with the (5) Anode/Column pins driven in parallel by the appropriate bit-pattern for each Row. The 14M2 doesn't even have a port as wide as 7 bits, so the driver code may be a little "untidy" regardless of how the matrix is driven. Finally, it's worth noting that most PICaxe Output pins can have
four states: "Low", "High", "Floating" and "Weak Pullup" (all used above), although it's difficult to devise a simple Hardware configuration to differentiate between all four states.
Cheers, Alan.