Error Deinitions.
Berny,
The answers are in the Proteus VSM Help under the heading Troubleshooting.
This is the first post on the forum, so I hope I have got it right.
Here is the section I think you are after.
regards
Peter
Simulation Errors
Simulation errors are generated by PROSPICE rather than ISIS, and therefore occur after a netlist file has been successfully generated. Common problems that get detected here include:
· Device type not recognized - This means you have specified a primitive type that is not supported, or that a model file has used one.
· No DC path to ground - This is discussed further under GROUND AND POWER RAILS.
· Could not find probe - you have tried to reference a probe or voltage generator that does not exist. Remember that you must use an IPROBE object from ASIMMDLS.LIB - you cannot reference a current probe gadget.
· Cannot open SPICE source file - The source file specified in a SPICEMODEL property cannot be located. It should be in the current directory or in the Module Path as set on the Set Paths dialogue form.
· Cannot find library model - The SUBCKT or MODEL you have specified does not exist in the specified library or on disk.
· Model DLL not found - The specified VSM model DLL cannot be located. It should be in the current directory or in the Module Path as set on the Set Paths dialogue form.
Convergence Problems
This final set of errors relate to what happens if SPICE itself fails to simulate the circuit. There are basically three error messages that indicate this:
· Singular matrix. This is akin to having more unknowns than equations and usually relates to circuits which are mis-drawn, or in which some initial conditions need to be given in order to define the starting state.
This error will often be preceded by "No DC path to ground" warnings, and you need to investigate the wiring around the pins listed after this message. If part of your circuit is not ground, the simulator can resolve its voltage relative to ground - it’s as simple as that.
· To many iterations without convergence. This means that circuit solution is unstable. Circuits with VSWITCH or CSWITCH primitives can create this condition easily, but any circuit whose transfer function is discontinuous can give SPICE serious problems.
· Timestep too small. This means that the circuit has switched in such a way that advancing the time even by very small amounts (typically 1E-18s) still does not produce an acceptably small change in circuit voltages.
Often, this is caused by a badly designed model, or by not supplying sufficient parameters to a diode or transistor model. In a particular, if the junction capacitance values are not chosen correctly, these devices will exhibit zero switching times which can lead directly to this error message.
Most convergence errors are due to badly drawn circuits or incorrect models - time after time we have had circuits sent in that ‘won’t simulate’ only to find that something isn’t connected. Please check the simulation log for clues, and re-check your circuit before jumping to the conclusion that PROSPICE is at fault.
