Background 'hserin' receive cannot currently be simulated! [U1_U1]

#1
That's the error message I get when trying to simulate a background receive using HSERIN. I presume that the error message is generated because the VSM model doesn't support this behaviour; is this correct? It's sad to say that the combination of unsupported behaviour and bugs in the model around the interrupt behaviour (28X2 and 40X2 we're talking about here) are making the simulating of data transfers between PICAXEs a lot more difficult than need be.
 
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