UPDATE:
I am about to rap up the DRF1212 Version of this project. New schematics and code will be forthcoming (after New Year's) . I will also include some screen shots from Saleae Logic to help show how the Picaxe Programming Protocol works. It is really quite simple, but not very efficient since it is done in 512 byte blocks.
What I mean by that is if, for example, a Picaxe program is only 70 bytes, it will first send the 70 bytes one at a time, then it will send 442 bytes one at at time with a value of "0" to fill the rest of this 512 byte block of flash memory. If the PE/Firmware was a bit smarter, it would know that the program was 70 bytes and would only send the relevant 70 bytes to the target, then internally write the ''0's" instead of sending them 1 byte at a time from the PE to the target.
This is also interesting as the flash memory page size of a 16F1825(14M2) is 64 bytes. With this family of 16F PIC's, flash memory must be erased/written in 64 byte blocks, so internally the PE/Firmware is configured to self-write (via the EECON registers) a minimum of 8 "erase blocks" of flash memory. At least for a 14M2 or 20M2. 18F PIC's may be a bit different( X2 chips)
Also, I will create a new Picaxe Wireless Programming thread in the User Projects section of this Forum as we move forward, and hope that at least a few of you have the time and resources to replicate my efforts and provide feedback / peer review.
For those that are interested, it will be helpful (but not absolutely necessary) to have a cheap 8 channel logic analyzer that can operate with Saleae Logic (1.2.29) and the latest version of LTSpice ( For schematic drawing)
DRF1212D10 are currently available here >>>
DRF1212 on Ebay
PS: The HC-19 Bluetooth modules are here !
Goey