The subject of bypassing/decoupling PICAXEs crops up a lot.
- so I thought I'd have a quick drivvel.
IMnsHO , people should include decoupling as standard practice - maybe I have OCD
This could be a long post , so I shall condense it (haha geddit?)
It certainly helps hugely in any circuit where you have noise and transients e.g. motors, relays.
In fact, where any +V line is shared decoupling/bypassing should be used on the PICAXE and other sensitive , switching or crowbarry chips. You'll see it in many of the Data Sheets you read (!).
AND, unknown to most and forgotten by many, a PIC chip is a source of noise.
The usual practice is one or two paralleled capacitors.
Typically an electrolytic/tantalum to act like a local 'reservoir' for slower dips and transients.
And a ceramic in parallel to act like a local reservoir for HF transients and to decouple the HF stuff.
These should be placed as physically close as possible to the chip's power pins with the shortest track/trace that you can manage.
After all, it's pointless have a nightclub bouncer 100m down the road ... nasties can sneak in behind him/her.
(Not entirely accurate , but you get my drift?)
The other concerns when dealing with HF noise include the capacitor characteristics. This varies with value/size/construction - including the dielectric used; X7R is good and NP0/COG is better. Anyone taking electronics seriously should read up and read Data Sheets.
And as usual, when you are looking for one thing you get diverted by something else...
This is from the 16F1826/27 Data Sheet referring to performance of the INTERNAL oscillator block.
"To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 uF and 0.01 uF values in parallel are recommended."
You'll note 2 relatively small values and these would be ceramic types.
This is because of the capacitor characteristics.
Notes.
Good decoupling (and track/trace layout practice) is also important to good ADC work.
All this assumes you have a good supply and neat layout.
It's sometimes difficult to polish a tu*d.
These things also apply to RF PCB design, but that's a whole different (and long) story.
Good luck with designing - and keep the noise down!
- so I thought I'd have a quick drivvel.
IMnsHO , people should include decoupling as standard practice - maybe I have OCD
This could be a long post , so I shall condense it (haha geddit?)
It certainly helps hugely in any circuit where you have noise and transients e.g. motors, relays.
In fact, where any +V line is shared decoupling/bypassing should be used on the PICAXE and other sensitive , switching or crowbarry chips. You'll see it in many of the Data Sheets you read (!).
AND, unknown to most and forgotten by many, a PIC chip is a source of noise.
The usual practice is one or two paralleled capacitors.
Typically an electrolytic/tantalum to act like a local 'reservoir' for slower dips and transients.
And a ceramic in parallel to act like a local reservoir for HF transients and to decouple the HF stuff.
These should be placed as physically close as possible to the chip's power pins with the shortest track/trace that you can manage.
After all, it's pointless have a nightclub bouncer 100m down the road ... nasties can sneak in behind him/her.
(Not entirely accurate , but you get my drift?)
The other concerns when dealing with HF noise include the capacitor characteristics. This varies with value/size/construction - including the dielectric used; X7R is good and NP0/COG is better. Anyone taking electronics seriously should read up and read Data Sheets.
And as usual, when you are looking for one thing you get diverted by something else...
This is from the 16F1826/27 Data Sheet referring to performance of the INTERNAL oscillator block.
"To ensure these oscillator frequency tolerances, VDD and VSS must be capacitively decoupled as close to the device as possible. 0.1 uF and 0.01 uF values in parallel are recommended."
You'll note 2 relatively small values and these would be ceramic types.
This is because of the capacitor characteristics.
Notes.
Good decoupling (and track/trace layout practice) is also important to good ADC work.
All this assumes you have a good supply and neat layout.
It's sometimes difficult to polish a tu*d.
These things also apply to RF PCB design, but that's a whole different (and long) story.
Good luck with designing - and keep the noise down!
