I am building a test circuit for optical links
I can generate test sequences controlled from a keyboard
The keyboard and the test sequences are executed using 7 tasks in a 20M2
As an afterthought I was planning to add a serial port control of the tester. The debug port (serrxd/sertxd) looked to be suitable.
So I added the 8'th task. Since the serrxd command is blocking (not a real UART but software UART) I added a 20ms timeout.
start7:
serrxd [20,start7],b0
.... rest of the code
I am running into a problem. The other tasks do not work anymore as before. Is it possible the serrxd command changes the 20M2 clock to 4MHz, but does not switch it back to 32MHz to comply with the multitasking timing ?
Am I doing something wrong ? Is there a way to achieve what I envision ?
I must admit that I turn to the picaxe platform for my projects often because of the simple multitasking (08M2 / 18M2 / 20M2). Did I plan 1 bridge too far this time ?
Thank you in advance for your help.
Volhout
I can generate test sequences controlled from a keyboard
The keyboard and the test sequences are executed using 7 tasks in a 20M2
As an afterthought I was planning to add a serial port control of the tester. The debug port (serrxd/sertxd) looked to be suitable.
So I added the 8'th task. Since the serrxd command is blocking (not a real UART but software UART) I added a 20ms timeout.
start7:
serrxd [20,start7],b0
.... rest of the code
I am running into a problem. The other tasks do not work anymore as before. Is it possible the serrxd command changes the 20M2 clock to 4MHz, but does not switch it back to 32MHz to comply with the multitasking timing ?
Am I doing something wrong ? Is there a way to achieve what I envision ?
I must admit that I turn to the picaxe platform for my projects often because of the simple multitasking (08M2 / 18M2 / 20M2). Did I plan 1 bridge too far this time ?
Thank you in advance for your help.
Volhout