Every PICmicro contains an area of memory known as SFR; Special Function Registers. This is a mix of Control Registers ( which define the configuration of the chip and allow its configuration and status to be determined ) and general purpose registers which can be used for data storage, this is the PICmicro equivalent of RAM ( Random Access Memory ).
SFR is accessed by using the PICAXE Peek and Poke commands. Read and Write commands are used to access the PICAXE Data Eeprom, not the SFR.
PICAXE SFR usage falls into four groups ...
1) Hardware Control Registers ( $00-$1F, $80-$9F )
2) Firmware RAM ( $20-$4F, $A0-$BF )
3) User RAM ( $50-$7F, $C0-$FF )
4) Inaccessible SFR ( $100 and above )
Accessing any SFR outside the User RAM areas specified in the PICAXE manual will in nearly all cases void any warranty on the PICAXE and may cause permanent damage to the PICAXE or attached circuit. Accessing such SFR is done entirely at your own risk.
It is highly recommended that addresses of SFR and RAM are always specified in hexadecimal and ideally Peeks and Pokes should use the named addresses as defined in the PICmicro datasheets, set by using the Symbol command, for example, '"Symbol PORT_A=$05". It is also highly recommended that constant values Poked to SFR are written in hexadecimal or binary, for example, "Poke PORT_A,%00001000". It may be necessary to alter the naming slightly ( as here ) where the name conflicts with other PICAXE usage.
Hardware Control Registers ( $00-$1F, $80-$9F )
These are defined by the underlying PICmicro hardware and documented in the relevant PICmicro Datasheet. For the 16F range it is highly likely that an SFR for a specific purpose is at the same location across the entire range but not always.
The PICAXE firmware will take control of some Control Registers and frequently update them, making it impossible to alter those permanently under program control; this is particularly true of the PORTx and TRISx registers. Other Control Registers may only be altered when a particular PICAXE command is executed, for example OSCTUNE is only updated by a CALIBFREQ command. Some may be initialised at Reset but are otherwise unaffected by the PICAXE Firmware.
Discovery of the Control Registers which the PICAXE does not update allows programmers to take control of the underlying hardware in ways the PICAXE does not otherwise facilitate. For example, PORTA is not updated by the 18X Firmware except when SERTXD is used allowing the programmer to Poke PORTA ($05) to alter the state of the Serial Out line under program control.
Altering Hardware Control Registers can affect the I/O configuration which is detrimental or damaging to the operation of the PICAXE and any attached circuit so care must be taken; turning an I/O pin into an output when that pin is connected to 0V or a power rail can destroy the I/O pin, the I/O port, or the entire PICAXE.
Note that the PICAXE Firmware uses some SFR very heavily during its operation ( FSR, INDF, PC, PCLATH, STATUS etc ) and altering those SFR's can have very detrimental effect upon the operation of the PICAXE or be entirely ineffective if the Firmware overwrites anything poked to them.
Firmware RAM ( $20-$4F, $A0-$BF )
This is the RAM used by the PICAXE Firmware to keep track of what it is doing and is used while processing program commands. In general it is a bad idea to alter this RAM as it can adversely affect the Firmware's operation and may even inadvertently alter the I/O configuration.
Discovering how the Firmware RAM is used allows the programmer to alter the operation of the Firmware in ways the PICAXE does not otherwise allow. For example, on the 18X there is a 'TRISB Shadow Register' at $AE which can be manipulated to turn the 18X output pins into inputs. The Subroutine Stack and Interrupt Return Address are held in this area and can be manipulated to good effect in some circumstances.
Firmware RAM usage can vary between PICAXE devices although for all PICAXE's ( except the X1 and X2 ), $32-$3F are used to hold the variable values of 'b0' through 'b13'.
User RAM ( $50-$7F, $C0-$FF )
These are otherwise unused SFR locations which can be used as RAM storage by PICAXE programs. Apart from being available for use they are of no other interest.
Note that $70-$7F may share physical space with $F0-$FF on some PICAXE's, thus a Poke to $75 will also update $F5 simultaneously and so forth. Not all RAM locations are available on all PICAXE's.
Any data held in RAM is "volatile". That means that the contents of RAM will be lost or corrupted when the PICAXE power is removed or supply voltage drops to below a certain level. The PICAXE will normally clear the RAM between $50 and $7F on Reset but may leave the RAM at $C0-$FF unchanged. This may be used to retain information across PICAXE Resets providing power is not removed.
Inaccessible SFR ( $100 and above )
Peek and Poke are limited to an address range of $00-$FF so any SFR, whether Hardware Control Register or available RAM, at $100 or above cannot be accessed. No mechanism has been found to gain access to those SFR locations. It is not possible to use the FSR and INDF registers to access these locations.
Attempting to access SFR at and above $100 will usually result in an access of the SFR at addresses $00-$FF ( the msb's of the address are ignored ) and this may inadvertently reference the Hardware Control Registers or Firmware RAM with the adverse consequences already mentioned.
Note that the Hardware Control Registers used to access Data Eeprom and Flash Program Memory where available are inaccessible and cannot be used to extract the Firmware from the PICAXE device.
Specific PICAXE SFR usage
The following posts detail the SFR usage for a variety of PICAXE devices. These will be updated as more information becomes available.
Neither the author nor Revolution Education Limited take responsibility for any errors or omissions or use of such information. All information is used entirely at your own risk.
SFR is accessed by using the PICAXE Peek and Poke commands. Read and Write commands are used to access the PICAXE Data Eeprom, not the SFR.
PICAXE SFR usage falls into four groups ...
1) Hardware Control Registers ( $00-$1F, $80-$9F )
2) Firmware RAM ( $20-$4F, $A0-$BF )
3) User RAM ( $50-$7F, $C0-$FF )
4) Inaccessible SFR ( $100 and above )
Accessing any SFR outside the User RAM areas specified in the PICAXE manual will in nearly all cases void any warranty on the PICAXE and may cause permanent damage to the PICAXE or attached circuit. Accessing such SFR is done entirely at your own risk.
It is highly recommended that addresses of SFR and RAM are always specified in hexadecimal and ideally Peeks and Pokes should use the named addresses as defined in the PICmicro datasheets, set by using the Symbol command, for example, '"Symbol PORT_A=$05". It is also highly recommended that constant values Poked to SFR are written in hexadecimal or binary, for example, "Poke PORT_A,%00001000". It may be necessary to alter the naming slightly ( as here ) where the name conflicts with other PICAXE usage.
Hardware Control Registers ( $00-$1F, $80-$9F )
These are defined by the underlying PICmicro hardware and documented in the relevant PICmicro Datasheet. For the 16F range it is highly likely that an SFR for a specific purpose is at the same location across the entire range but not always.
The PICAXE firmware will take control of some Control Registers and frequently update them, making it impossible to alter those permanently under program control; this is particularly true of the PORTx and TRISx registers. Other Control Registers may only be altered when a particular PICAXE command is executed, for example OSCTUNE is only updated by a CALIBFREQ command. Some may be initialised at Reset but are otherwise unaffected by the PICAXE Firmware.
Discovery of the Control Registers which the PICAXE does not update allows programmers to take control of the underlying hardware in ways the PICAXE does not otherwise facilitate. For example, PORTA is not updated by the 18X Firmware except when SERTXD is used allowing the programmer to Poke PORTA ($05) to alter the state of the Serial Out line under program control.
Altering Hardware Control Registers can affect the I/O configuration which is detrimental or damaging to the operation of the PICAXE and any attached circuit so care must be taken; turning an I/O pin into an output when that pin is connected to 0V or a power rail can destroy the I/O pin, the I/O port, or the entire PICAXE.
Note that the PICAXE Firmware uses some SFR very heavily during its operation ( FSR, INDF, PC, PCLATH, STATUS etc ) and altering those SFR's can have very detrimental effect upon the operation of the PICAXE or be entirely ineffective if the Firmware overwrites anything poked to them.
Firmware RAM ( $20-$4F, $A0-$BF )
This is the RAM used by the PICAXE Firmware to keep track of what it is doing and is used while processing program commands. In general it is a bad idea to alter this RAM as it can adversely affect the Firmware's operation and may even inadvertently alter the I/O configuration.
Discovering how the Firmware RAM is used allows the programmer to alter the operation of the Firmware in ways the PICAXE does not otherwise allow. For example, on the 18X there is a 'TRISB Shadow Register' at $AE which can be manipulated to turn the 18X output pins into inputs. The Subroutine Stack and Interrupt Return Address are held in this area and can be manipulated to good effect in some circumstances.
Firmware RAM usage can vary between PICAXE devices although for all PICAXE's ( except the X1 and X2 ), $32-$3F are used to hold the variable values of 'b0' through 'b13'.
User RAM ( $50-$7F, $C0-$FF )
These are otherwise unused SFR locations which can be used as RAM storage by PICAXE programs. Apart from being available for use they are of no other interest.
Note that $70-$7F may share physical space with $F0-$FF on some PICAXE's, thus a Poke to $75 will also update $F5 simultaneously and so forth. Not all RAM locations are available on all PICAXE's.
Any data held in RAM is "volatile". That means that the contents of RAM will be lost or corrupted when the PICAXE power is removed or supply voltage drops to below a certain level. The PICAXE will normally clear the RAM between $50 and $7F on Reset but may leave the RAM at $C0-$FF unchanged. This may be used to retain information across PICAXE Resets providing power is not removed.
Inaccessible SFR ( $100 and above )
Peek and Poke are limited to an address range of $00-$FF so any SFR, whether Hardware Control Register or available RAM, at $100 or above cannot be accessed. No mechanism has been found to gain access to those SFR locations. It is not possible to use the FSR and INDF registers to access these locations.
Attempting to access SFR at and above $100 will usually result in an access of the SFR at addresses $00-$FF ( the msb's of the address are ignored ) and this may inadvertently reference the Hardware Control Registers or Firmware RAM with the adverse consequences already mentioned.
Note that the Hardware Control Registers used to access Data Eeprom and Flash Program Memory where available are inaccessible and cannot be used to extract the Firmware from the PICAXE device.
Specific PICAXE SFR usage
The following posts detail the SFR usage for a variety of PICAXE devices. These will be updated as more information becomes available.
Neither the author nor Revolution Education Limited take responsibility for any errors or omissions or use of such information. All information is used entirely at your own risk.
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