Hserout & Sertxd on same pin OK 08M2 14M2 ?

[premelec]

Manual 2 says cannot use Hserout on download Serout pin [p94] - however manual 1 shows same pin for Sertxd and Hserout on same pin in diagrams [page 10]. Is this just a manual error? I'm about to try a bunch of stuff I haven't done before and need to spit out a lot of data fast.... thanks...

 

[inglewoodpete]

I use the SerOut pin on both the 08M2 and the 14M2 for the hSerOut command. No problems noticed.

 

[hippy]

I suspect this is a case where the text in the manual has not kept up with PICAXE device enhancements. For 08M2 and 14M2 HSEROUT can only be used on the pin which is also used for SERTXD.

 

[Technical]

The reason it gets confusing is that the hsersetup command configures the pin to use the special internal EUASRT silicon.
Therefore the EUSART polarity setting can invert the signal and any bit-bashed commands like debug/sertxd etc may then not work correctly as the pin is EUSART controlled, not normal output controlled.

So as along as you *only* use hserout on that pin (don't try and mix with debug etc), and accept that you may need to do a hard-reset for a new download, then you should be ok.

 

[AllyCat]

Hi,

For 08M2 and 14M2 HSEROUT can only be used on the pin which is also used for SERTXD.

Whilst that's true in terms of the PICaxe documentation, if you're desperate there is the Alternative Pin Function SFR which (probably) allows HSEROUT to use Leg 3 (08M2) or Leg 6 (14M2). Personally, I find the "Table 1 - Pin Allocation Table" very near the start of the base PIC datasheets to be invaluable.

I know technical doesn't "approve" of using the APFCON register(s) but it seems to work, or you could "throw" bytes directly at the hardware using a POKESFR to the TXREG.

Cheers, Alan.

 

[jims]

Allycat...please post a link to that "Pin Allocation Table". Thank you, Jims

 

[AllyCat]

Hi,

Generally, it's around page 3 - 8 (depends on the complexity of the chip and if multiple chips are included in the datasheet), before the Table of Contents of the relevant Microchip Datasheet, which are linked from here.

Cheers, Alan.

 

[jims]

Hi,

Generally, it's around page 3 - 8 (depends on the complexity of the chip and if multiple chips are included in the datasheet), before the Table of Contents of the relevant Microchip Datasheet, which are linked from here.

Cheers, Alan.

Thank you Alan... JimS