bpowell & papaof2,
I have to stand up for Rev-Ed.
I'm not bashing or talking down Rev-Ed / PICAXE ...
So while the DMA controller could be used to move bytes from A to B this seems to me to be a function that Rev-Ed already provide with their X2 background receive feature.
I suspect the X2 "Background Receive" is just the hardware UART RX buffer ... which is a core-
independent-peripheral ... that is, the UART can receive 2 bytes of data and latch them into the buffer without ever having to bother the core CPU.
However, if you want to move those two bytes somewhere else, then you're going to need CPU intervention ... using a hardware interrupt for instance, would work great...you could react to the RXBuffer Full interrupt, and then pause current code, push all the key registers to the stack, move to the interrupt, execute the interrupt, pop all the registers back from the stack, move back to where the code was interrupted, and resume execution. (That's the process for any interrupt).
Or, you could configure the DMA to notice, "Hey, a byte has arrived at location A, and my job is to move xx number of bytes from A to B ..." the DMA would then wait for access to the data bus (or, take access of the bus, based on the mode) and move from A to B and then release the bus.
So, while the DMA takes CPU "Cycles", it doesn't utilize the CPU ... it simply needs access to the data bus to move bytes around...and it can't do that while the CPU is using the same bus at the same time. So, as you probably noted further down in the datasheet, the DMAC can utilize time that would otherwise be wasted .... e.g.
Code:
1. Access to the Program Flash Memory, then the peripheral waits for an instruction cycle in which the CPU does
not need to access the PFM (such as a branch instruction) and uses that cycle to do its own Program Flash
Memory access, unless a PFM Read/Write operation is in progress.
2. Access to the SFR/GPR, then the peripheral waits for an instruction cycle in which the CPU does not need to
access the SFR/GPR (such as MOVLW, CALL, NOP) and uses that cycle to do its own SFR/GPR access.
So, DMA is different than the "Background Receive" feature from PICAXE ... in my mind, it's more efficient and faster than utilizing interrupts...but, it's not yet available in PICAXE, so it's a moot point.
But as an example: I'm using DMA on a PIC18 to receive two GPS sentences at 115,200 baud and at 2 (or 5?) hz frequency ... the chip happily runs other code while the DMAC receives bytes and stores them into an array, and only takes a break when it's time to parse those sentences and do things with the received data. I could probably go faster on the baud rate, but it's a chore to re-program the UBLOX GPS, so I haven't tried to up the bps on it.