CHI035A Document Error

[B4Lamb]

Data Sheet Apeendix A on Page 7 has an error on the schematic diagram. Inputs C.5, C.6 and C.7 are shown wired to C.6, C.7 and C.5 respectively. They are indeed tracked on the board to the correct pins on the 18M2 chip so the input notation and the silk screen idents on the physical board are correct.

 

[B4Lamb]

Also note that when fitting a 78L05 in the RG1 position there are no supply input bypass capacitors on the V+PWR to Ground. A 0.22 uF is recommended on the unregulated input of a 78L05.