20X2 and #SLOT 4 [SOLVED]

bpowell

Senior Member
Hello All,

According to the documentation, I should be able to use I2C EEPROM (#slot 4).

I'm running PE 6.2.0.0 and Compiler Version 3.4, and I get this error when trying to use "#SLOT 4" (to place my program ON the eeprom)

Code:
#slot - 20X2 only has slot 0!

Any ideas?

SOLVED in Post 7 below ...
 
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@bpowell
I couldn't find anywhere in the pdf manual where it describes how many slots each chip supports.

It's always a good idea to check the online version of the manual as it is more up-to-date then the pdf manual.
#slot - BASIC command
Code:
14M2, 18M2+, 20M2 parts -
2 internal slots (0-1)
When the chip is reset, slot 0 automatically runs. Slot 1 can be started with a 'run 1' command within slot 0.
28X2, 40X2 -
4 internal slots (0-3) or 4 i2c program slots (4-7)
When the chip is reset, slot 0 automatically runs. Slot 1 (or any other slot) can be started with a 'run 1' command within slot 0.
and the 08M2 & 20X2 chips are not documented as having more than the single slot 0.

I don't have an I2C EEPROM to actually test this with a program download to slot 7, but PE 6.2 accepts the "#slot 7" command for the 28X2 chip:
28X2 slot 7.PNG
 
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Thanks Flesner.

In the online guides, take a look at Booti2c ... this indicates you can boot FROM an eerpom into a 20x2 (implying you should also be able to PUT that code on the eeprom with #slot 4) ... also, there are post in this forum from Technical saying Slot 4 should work on 20x2 ... I think Buzby even got it working.

In the change notes for PE 6.1, there's a note in there that it was fixed to allow 20x2 to use Slot 4 ... but then it says (Beta compiler)? What's that?
 
implying you should also be able to PUT that code on the eeprom with #slot 4
@bpowell,

That is not how I interpret the documentation.

The online manual for the BOOT2IC command documents how the command works and which chips support the BOOT2IC command:
  • "On X2 parts it is possible to update the internal program by copying a new program from an external i2c EEPROM", and
  • "Applies To: 20X2, 28X2, 40X2"
Nowhere does the boot2ic manual document which slots are supported to use on the X2 chips

Similarly, the online manual for #SLOT documents which M2 & X2 chips support more than the single slot 0 and nowhere in the #SLOT manual does it comment on which chips support the BOOT2IC command.
  • Personally, I think explicitly documenting that all other chips only support a single slot 0 would be better than leaving it to the users to infer this.

In the change notes for PE 6.1, there's a note in there that it was fixed to allow 20x2 to use Slot 4 ... but then it says (Beta compiler)? What's that?
PE6.2 comes with the current production versions of the compliers, which for the 20x2 is version 3.1:
Code:
C:\Program Files (x86)\Revolution Education\PICAXE Editor\Compilers>picaxe20x2.exe
PICAXE-20X2 Compiler
Version 3.4
Copyright (c) 1996-2016
Revolution Education Ltd

The beta version of the compliers are a new version that is not considered ready for production. The beta refers to them being in the beta testing phase before being approved to replace the v3.4 compisers as the production versions in PE6.

My recollection is that the beta compilers used to be available for download from this page PICAXE Compilers but if they were then they are no longer available for download.
 
Well, I've dusted-off and fired-up PE5 ...

No problem, declared #slot 4 and sent a program (through the 20x2) to EEPROM starting at address 0.

Now, I can have some other program running on the 20x2 ... OR, I can simply have a "run 4" command for my 20x2 program, and it will execute the code in "slot 4" which is from the EEPROM. I'm sure BootI2C works as well, but didn't test it ... as "run 4" told me what I needed.

So, the functionality clearly exists ... the chip knows what to do to retrieve and execute code ... The compiler (at one time) knew how to do this ... but that functionality seems to have been lost in PE6 ... unless you can get your hands on the "beta compiler"

Frustrating.

Now the next mystery ... my little "test" program compiles to 36 bytes, but takes MUCH more (I haven't counted yet .. but maybe 7x or 8x the space?) than 36 bytes up on the EEPROM.
 
Well, I've dusted-off and fired-up PE5 ...
No problem, declared #slot 4 and sent a program (through the 20x2) to EEPROM starting at address 0.
(y)

Now the next mystery ... my little "test" program compiles to 36 bytes, but takes MUCH more (I haven't counted yet .. but maybe 7x or 8x the space?) than 36 bytes up on the EEPROM.
I've no experience using external EEPROM so I can't help with this.
 
Just a little note about booti2c.

The code downloaded to the eeprom, either internal or external, has a revision number included. Usually this means you have to update the revision number before each download, or booti2c won't work. This is a pain.

A simple fix is to reset the existing number to zero in the code before booti2c, ( see post #7 ). and set a non-zero value in the new code.
This means the revision numbers are always different, and you can download and booti2c easily.

PE6_bootic2_.JPG
 
The code downloaded to the eeprom, either internal or external, has a revision number included. Usually this means you have to update the revision number before each download, or booti2c won't work. This is a pain.
I suspect the PICAXE takes a look at the "onboard" revision number and then the revision number on the EEPROM ... and if they match, the PICAXE does NOT grab the file from the EEPROM and burn it to internal flash ... which is good ... internal flash is rated to like 10,000 write/erase cycles, so you don't want it getting written two every time you power cycle the project.

Right now, I'm just playing with #slot 4 and run 4 ... I'm not doing the booti2c stuff.

I'm trying to figure out why a 36-byte program ends up taking up 255 bytes stored on the eeprom ...
 
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