High current tristate buffer, how to build one ?

Buzby

Senior Member
Hi All,

The 20mA output capability of the PICAXE is not enough for my next project, I need about 200mA source and sink for each pin.

Designing a buffer with two MOSFETS, ( one P one N ), for each pin is quite easy, - but I need tristate as well.

The 'normal' way would be to use another pin and a bit of gating to 'turn off' both FETS.

But I want the FETs to go tristate when the PICAXE pin goes tristate, without using an extra signal.

I'm fairly certain it could be done with some clever biasing or a couple of diodes, but I don't want to spend time re-designing if it's already been done.

There may even be a buffer IC somewhere, but I don't know where to start looking.

Any ideas ?

Thanks,

Buzby
 

kranenborg

Senior Member
Hello Buzby,

I needed exactly the same thing a while ago and got a well-functioning design from wilf_nv for my SerialPower network architecture, see the first picture in the following link (the output called "NetSerialOut" is a tristate I/O pin and used as such): http://www.picaxeforum.co.uk/showthread.php?7694-quot-SerialPower-quot-true-two-wire-data-power-network&p=79916&viewfull=1#post79916
PS: forget about the pullup resistor at the FET ouputs since these are specific for the application
Best regards,
Jurjen
 

Dippy

Moderator
Why do you have to use "another pin"?
I must have misunderstood.
But without application details it's tricky to say.
 

Buzby

Senior Member
Why do you have to use "another pin"?
I must have misunderstood.
I'm not an electronics engineer, so the only way I could see was the way that datasheets for micros show.
They use one signal for 'data' which drives the gates of two FETs via two AND gates.
The other input of each AND gate is connected to an 'enable' signal.
( Actually it it an 'enable' and a 'bar-enable', but you get the drift. )

The output follows the 'data' by switching either one of the two FETS 'on', unless the 'enable' is low, which switches both FETs 'off'.
Sometimes it's a bit of a different FET arrangement, but there is always a 'data' and an 'enable' signal.

( There is a lot of explanations on the web, including some neat Java simulations.
See : http://tams-www.informatik.uni-hamburg.de/applets/hades/webdemos/05-switched/40-cmos/tristate.html )

But without application details it's tricky to say.
Application is simple (?), high power Charliplexing !.

Cheers,

Buzby
 

AllyCat

Senior Member
Hi,

The "optimum" solution may depend on whether cost or quiescent power consumption, etc., are issues and if the supply rail is stabilised, etc., but the link from kranenborg looks a good starting point.

Certainly signalling the "tri-state" mode with Vcc/2 seems best. You might find a complementary pair of logic level FETs which are guaranteed OFF at 2.5 volts on their gates (and ON at 5 volts) which would only need the addition of 2 resistors per pin.

With a stabilised supply rail, the cheapest solution could be a pair of complementary bipolar transistors (emitters to supply/ground) with potential dividers from the PICaxe pin to their bases. With, say, 470 ohm + 100 ohm dividers, the transistors should be reasonably OFF with the 450mV on their bases but ON with the appropriate 470 ohms pulled up to 5v (or down to ground for the PNP). But that design might be rather "marginal", being prone to thermal runaway (VBE falls as the temperature rises).

So personally, I'd suggest kranenborg's configuration but with bipolar transistors in place of the FETs (say BC327 + BC337). The base-base resistor for the output pair would probably need to be about 470 ohms to give sufficient drive current for bipolars at 200mA collector current.

Cheers, Alan.
 
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